1. Technical Field
The inventive concept relates to a semiconductor memory device, and more particularly, to a semiconductor memory device for reducing bit line coupling noise.
2. Discussion of the Related Art
Semiconductor memory devices having large storage capacity, low power consumption, and fast operational performance are being, and have been, developed. However, as storage capacity increases, so does interference noise between adjacent bit lines of the semiconductor memory devices. Further, in semiconductor memory devices that have low power consumption, an operating voltage used to perform a data access operation, such as a read operation and a write operation, decreases. The interference noise between adjacent bit lines (also referred to as “bit line coupling noise”) is caused by a coupling effect due to a parasitic capacitance existing between the adjacent bit lines. This noise can impact a voltage margin of a memory cell and a sensing margin of a bit line sense amplifier. Accordingly, there is a need to reduce bit line coupling noise.